Searched refs:KVM_REG_RISCV_SUBTYPE_MASK (Results 1 – 5 of 5) sorted by relevance
263 reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_sbi_ext()264 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_sbi_ext()297 reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_sbi_ext()298 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_sbi_ext()
395 reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_csr()396 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_csr()434 reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_csr()435 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_csr()569 reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_isa_ext()570 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_get_reg_isa_ext()608 reg_subtype = reg_num & KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_isa_ext()609 reg_num &= ~KVM_REG_RISCV_SUBTYPE_MASK; in kvm_riscv_vcpu_set_reg_isa_ext()
164 #define KVM_REG_RISCV_SUBTYPE_MASK 0x0000000000FF0000 macro
245 __u64 reg_subtype = reg_off & KVM_REG_RISCV_SUBTYPE_MASK; in csr_id_to_str()247 reg_off &= ~KVM_REG_RISCV_SUBTYPE_MASK; in csr_id_to_str()405 __u64 reg_subtype = reg_off & KVM_REG_RISCV_SUBTYPE_MASK; in sbi_ext_id_to_str()407 reg_off &= ~KVM_REG_RISCV_SUBTYPE_MASK; in sbi_ext_id_to_str()
209 #define KVM_REG_RISCV_SUBTYPE_MASK 0x0000000000FF0000 macro