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Searched refs:KS2_MSMC_DST_SEG_BASE (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-keystone/
H A Dddr3.c198 KS2_MSMC_DST_SEG_BASE + seg, in ddr3_reset_data()
203 KS2_MSMC_DST_SEG_BASE + seg, in ddr3_reset_data()
/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dhardware.h265 #define KS2_MSMC_DST_SEG_BASE (CONFIG_SYS_LPAE_SDRAM_BASE >> \ macro