Home
last modified time | relevance | path

Searched refs:KS2_DDR3_WR_ECC_ERR_SYS (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-keystone/
H A Dddr3.c138 KS2_DDR3_WR_ECC_ERR_SYS, in ddr3_ecc_config()
143 KS2_DDR3_WR_ECC_ERR_SYS, in ddr3_ecc_config()
337 if (value & KS2_DDR3_WR_ECC_ERR_SYS) in ddr3_check_ecc_int()
/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dhardware.h106 #define KS2_DDR3_WR_ECC_ERR_SYS BIT(3) macro