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Searched refs:KS2_DDR3_SDTIM1_OFFSET (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-keystone/include/mach/
H A Dhardware.h86 #define KS2_DDR3_SDTIM1_OFFSET 0x18 macro
/openbmc/u-boot/arch/arm/mach-keystone/
H A Dddr3.c104 __raw_writel(emif_cfg->sdtim1, base + KS2_DDR3_SDTIM1_OFFSET); in ddr3_init_ddremif()