Searched refs:JH7110_SYSCLK_VENC_AXI (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/clk/starfive/ |
| H A D | clk-starfive-jh7110-sys.c | 150 JH71X0__DIV(JH7110_SYSCLK_VENC_AXI, "venc_axi", 15, JH7110_SYSCLK_PLL2_OUT),
151 JH71X0_GATE(JH7110_SYSCLK_WAVE420L_AXI, "wave420l_axi", 0, JH7110_SYSCLK_VENC_AXI),
155 JH71X0_GATE(JH7110_SYSCLK_NOC_BUS_VENC_AXI, "noc_bus_venc_axi", 0, JH7110_SYSCLK_VENC_AXI),
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | starfive,jh7110-crg.h | 94 #define JH7110_SYSCLK_VENC_AXI 77 macro
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