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Searched refs:JH7100_CLK_CPU_AXI (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/clk/starfive/
H A Dclk-starfive-jh7100.c83 JH71X0__DIV(JH7100_CLK_CPU_AXI, "cpu_axi", 8, JH7100_CLK_CPU_CORE),
91 JH71X0_GATE(JH7100_CLK_U74_AXI, "u74_axi", CLK_IS_CRITICAL, JH7100_CLK_CPU_AXI),
93 JH71X0_GATE(JH7100_CLK_SGDMA2P_AXI, "sgdma2p_axi", 0, JH7100_CLK_CPU_AXI),
94 JH71X0_GATE(JH7100_CLK_DMA2PNOC_AXI, "dma2pnoc_axi", 0, JH7100_CLK_CPU_AXI),
146 JH7100_CLK_CPU_AXI,
/openbmc/linux/include/dt-bindings/clock/
H A Dstarfive-jh7100.h30 #define JH7100_CLK_CPU_AXI 21 macro