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Searched refs:IO_APIC_SECONDARY_IRQBASE (Results 1 – 5 of 5) sorted by relevance

/openbmc/qemu/include/hw/intc/
H A Dioapic.h26 #define IO_APIC_SECONDARY_IRQBASE 24 /* primary 0 -> 23, secondary 24 -> 47 */ macro
/openbmc/qemu/hw/i386/
H A Dmicrovm-dt.c53 if (irq >= IO_APIC_SECONDARY_IRQBASE) { in dt_add_microvm_irq()
54 irq -= IO_APIC_SECONDARY_IRQBASE; in dt_add_microvm_irq()
H A Dacpi-common.c124 IO_APIC_SECONDARY_ADDRESS, IO_APIC_SECONDARY_IRQBASE); in acpi_build_madt()
H A Dx86-common.c476 case IO_APIC_SECONDARY_IRQBASE in gsi_handler()
477 ... IO_APIC_SECONDARY_IRQBASE + IOAPIC_NUM_PINS - 1: in gsi_handler()
478 qemu_set_irq(s->ioapic2_irq[n - IO_APIC_SECONDARY_IRQBASE], level); in gsi_handler()
H A Dmicrovm.c192 mms->virtio_irq_base = IO_APIC_SECONDARY_IRQBASE; in microvm_devices_init()