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Searched refs:INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_10_0_sh_mask.h12484 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE__SHIFT 0x5 macro
H A Ddce_11_0_sh_mask.h12490 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE__SHIFT 0x5 macro
H A Ddce_11_2_sh_mask.h13106 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE__SHIFT 0x5 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_0_1_sh_mask.h77 #define INTERRUPT_CONTROL__STREAM_5_INTERRUPT_ENABLE__SHIFT macro