Searched refs:INTEL_PMC_IDX_FIXED_VLBR (Results 1 – 5 of 5) sorted by relevance
/openbmc/linux/arch/x86/kvm/vmx/ |
H A D | pmu_intel.c | 289 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in intel_pmu_create_guest_lbr_event() 302 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in intel_pmu_create_guest_lbr_event() 335 __set_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)->pmc_in_use); in intel_pmu_handle_lbr_msrs_access() 339 clear_bit(INTEL_PMC_IDX_FIXED_VLBR, vcpu_to_pmu(vcpu)->pmc_in_use); in intel_pmu_handle_lbr_msrs_access() 578 bitmap_set(pmu->all_valid_pmc_idx, INTEL_PMC_IDX_FIXED_VLBR, 1); in intel_pmu_refresh() 712 if (test_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use)) in vmx_passthrough_lbr_msrs() 719 __clear_bit(INTEL_PMC_IDX_FIXED_VLBR, pmu->pmc_in_use); in vmx_passthrough_lbr_msrs()
|
/openbmc/linux/arch/x86/include/asm/ |
H A D | perf_event.h | 391 #define INTEL_PMC_IDX_FIXED_VLBR (GLOBAL_STATUS_LBRS_FROZEN_BIT) macro
|
/openbmc/linux/arch/x86/events/intel/ |
H A D | lbr.c | 685 return test_bit(INTEL_PMC_IDX_FIXED_VLBR, in vlbr_exclude_host() 1617 __EVENT_CONSTRAINT(INTEL_FIXED_VLBR_EVENT, (1ULL << INTEL_PMC_IDX_FIXED_VLBR),
|
H A D | core.c | 2497 case INTEL_PMC_IDX_FIXED_VLBR: in intel_pmu_disable_event() 2821 case INTEL_PMC_IDX_FIXED_VLBR: in intel_pmu_enable_event()
|
/openbmc/linux/arch/x86/events/ |
H A D | core.c | 1228 case INTEL_PMC_IDX_FIXED_VLBR: in x86_assign_hw_event()
|