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Searched refs:INSN (Results 1 – 16 of 16) sorted by relevance

/openbmc/qemu/target/avr/
H A Ddisas.c162 INSN(IJMP, "")
163 INSN(EIJMP, "")
166 INSN(ICALL, "")
167 INSN(EICALL, "")
169 INSN(RET, "")
170 INSN(RETI, "")
208 INSN(LPM1, "")
211 INSN(ELPM1, "")
214 INSN(SPM, "")
242 INSN(BREAK, "")
[all …]
/openbmc/qemu/target/openrisc/
H A Ddisas.c83 INSN(j, "%d", a->n)
84 INSN(jal, "%d", a->n)
85 INSN(bf, "%d", a->n)
86 INSN(bnf, "%d", a->n)
87 INSN(jr, "r%d", a->b)
88 INSN(jalr, "r%d", a->b)
100 INSN(nop, "")
143 INSN(msync, "")
144 INSN(psync, "")
145 INSN(csync, "")
[all …]
/openbmc/qemu/target/loongarch/
H A Ddisas.c351 INSN(clo_w, rr) in INSN() function
352 INSN(clz_w, rr) in INSN()
353 INSN(cto_w, rr) in INSN()
354 INSN(ctz_w, rr) in INSN()
355 INSN(clo_d, rr) in INSN()
427 INSN(break, i) in INSN()
428 INSN(syscall, i) in INSN()
614 INSN(dbar, i) in INSN()
615 INSN(ibar, i) in INSN()
675 INSN(idle, i) in INSN()
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/openbmc/qemu/tests/tcg/hexagon/
H A Dusr.c57 INSN "\n\t" \
66 #define FUNC_R_OP_R(NAME, INSN) \ argument
69 #define FUNC_R_OP_P(NAME, INSN) \ argument
89 INSN "\n\t" \
110 INSN "\n\t" \
149 INSN "\n\t" \
170 INSN "\n\t" \
195 INSN "\n\t" \
224 INSN "\n\t" \
249 INSN "\n\t" \
[all …]
/openbmc/qemu/target/m68k/
H A Dtranslate.c5772 INSN(cas, 0ac0, ffc0, CAS); in register_m68k_insns()
5773 INSN(cas, 0cc0, ffc0, CAS); in register_m68k_insns()
5774 INSN(cas, 0ec0, ffc0, CAS); in register_m68k_insns()
5775 INSN(cas2w, 0cfc, ffff, CAS); in register_m68k_insns()
5776 INSN(cas2l, 0efc, ffff, CAS); in register_m68k_insns()
5839 INSN(rtd, 4e74, ffff, RTD); in register_m68k_insns()
5949 INSN(fpu, f200, ffc0, FPU); in register_m68k_insns()
5950 INSN(fscc, f240, ffc0, FPU); in register_m68k_insns()
5953 INSN(fbcc, f280, ff80, FPU); in register_m68k_insns()
5957 INSN(frestore, f340, ffc0, FPU); in register_m68k_insns()
[all …]
/openbmc/qemu/target/arm/tcg/
H A Dtranslate-mve.c531 #define DO_1OP_VEC(INSN, FN, VECFN) \ argument
532 static bool trans_##INSN(DisasContext *s, arg_1op *a) \
543 #define DO_1OP(INSN, FN) DO_1OP_VEC(INSN, FN, NULL) argument
620 #define DO_VCVT_RMODE(INSN, RMODE, U) \ argument
621 static bool trans_##INSN(DisasContext *s, arg_1op *a) \
635 #define DO_VCVT_SH(INSN, FN) \ in DO_VCVT_RMODE() argument
636 static bool trans_##INSN(DisasContext *s, arg_1op *a) \ in DO_VCVT_RMODE()
695 #define DO_VMOVN(INSN, FN) \ argument
845 #define DO_2OP(INSN, FN) DO_2OP_VEC(INSN, FN, NULL) argument
1607 #define DO_2SHIFT(INSN, FN, NEGATESHIFT) \ argument
[all …]
H A Dtranslate-neon.c806 DO_3SAME(INSN, gen_##INSN##_3s)
841 DO_3SAME_NO_SZ_3(INSN, gen_##INSN##_3s)
918 DO_3SAME(INSN, gen_##INSN##_3s)
925 DO_3SAME_64(INSN, gen_##INSN##_elt)
3182 #define DO_VMOVN(INSN, FUNC) \ argument
3183 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
3414 #define DO_2MISC_VEC(INSN, FN) \ argument
3415 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
3461 #define DO_2M_CRYPTO(INSN, FEATURE, SIZE) \ argument
3462 static bool trans_##INSN(DisasContext *s, arg_2misc *a) \
[all …]
H A Dmve_helper.c1810 #define DO_DAV_S(INSN, XCHG, EVENACC, ODDACC) \ argument
1811 DO_DAV(INSN##b, 1, int8_t, XCHG, EVENACC, ODDACC) \
1812 DO_DAV(INSN##h, 2, int16_t, XCHG, EVENACC, ODDACC) \
1813 DO_DAV(INSN##w, 4, int32_t, XCHG, EVENACC, ODDACC)
1815 #define DO_DAV_U(INSN, XCHG, EVENACC, ODDACC) \ argument
1816 DO_DAV(INSN##b, 1, uint8_t, XCHG, EVENACC, ODDACC) \
1817 DO_DAV(INSN##h, 2, uint16_t, XCHG, EVENACC, ODDACC) \
1818 DO_DAV(INSN##w, 4, uint32_t, XCHG, EVENACC, ODDACC)
1913 #define DO_VMAXMINV_U(INSN, FN) \ argument
1916 DO_VMAXMINV(INSN##w, 4, uint32_t, uint32_t, FN)
[all …]
H A Dtranslate-vfp.c2250 #define MAKE_ONE_VFM_TRANS_FN(INSN, PREC, NEGN, NEGD) \ argument
2251 static bool trans_##INSN##_##PREC(DisasContext *s, \
2252 arg_##INSN##_##PREC *a) \
2388 #define DO_VFP_2OP(INSN, PREC, FN, CHECK) \ argument
2389 static bool trans_##INSN##_##PREC(DisasContext *s, \
2390 arg_##INSN##_##PREC *a) \
2398 #define DO_VFP_VMOV(INSN, PREC, FN) \ argument
2399 static bool trans_##INSN##_##PREC(DisasContext *s, \
2400 arg_##INSN##_##PREC *a) \
/openbmc/qemu/tests/tcg/ppc64/
H A Dnon_signalling_xscv.c6 #define TEST(INSN, B_HI, B_LO, T_HI, T_LO) \ argument
12 INSN " 32, 32\n\t" \
19 printf(INSN "(0x%016" PRIx64 "%016" PRIx64 ") = 0x%016" PRIx64 \
H A Dvsx_f2i_nan.c11 #define DEFINE_VSX_F2I_FUNC(SRC_T, DEST_T, INSN) \ argument
16 asm(#INSN " %x0, %x1" : "=wa" (result) : "wa" (v)); \
/openbmc/qemu/tests/tcg/hppa/
H A Dstby.c41 #define TEST(INSN, OFS, E) \ argument
44 asm volatile(INSN " %1, " #OFS "(%0)" \
46 check(&s, E, which, INSN, OFS); \
/openbmc/linux/arch/sparc/kernel/
H A Dvisemul.c136 #define RS1(INSN) (((INSN) >> 14) & 0x1f) argument
137 #define RS2(INSN) (((INSN) >> 0) & 0x1f) argument
138 #define RD(INSN) (((INSN) >> 25) & 0x1f) argument
/openbmc/linux/arch/loongarch/include/asm/
H A Dinst.h33 #define ADDR_IMM(addr, INSN) \ argument
34 (sign_extend64(((addr & ADDR_IMMMASK_##INSN) >> ADDR_IMMSHIFT_##INSN), ADDR_IMMSBIDX_##INSN))
/openbmc/qemu/disas/
H A Dsparc.c2265 #define HASH_INSN(INSN) \ argument
2266 ((((INSN) >> 24) & 0xc0) | (((INSN) & opcode_bits[((INSN) >> 30) & 3]) >> 19))
/openbmc/linux/tools/perf/
H A Dbuiltin-script.c1513 if (PRINT_FIELD(INSN) && sample->insn_len) { in perf_sample__fprintf_insn()