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Searched refs:IMX_SDRAMC_BASE (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h53 #define IMX_SDRAMC_BASE (0x21000 + IMX_IO_BASE) macro
86 #define SDCTL0 __REG(IMX_SDRAMC_BASE) /* SDRAM 0 Control Register */
87 #define SDCTL1 __REG(IMX_SDRAMC_BASE + 0x4) /* SDRAM 1 Control Register */
88 #define SDMISC __REG(IMX_SDRAMC_BASE + 0x14) /* Miscellaneous Register */
89 #define SDRST __REG(IMX_SDRAMC_BASE + 0x18) /* SDRAM Reset Register */