Searched refs:IMX93_CLK_SYS_PLL_PFD1_DIV2 (Results 1 – 3 of 3) sorted by relevance
15 #define IMX93_CLK_SYS_PLL_PFD1_DIV2 6 macro
319 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;592 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;782 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,784 <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>;808 assigned-clock-parents = <&clk IMX93_CLK_SYS_PLL_PFD1_DIV2>,
286 clks[IMX93_CLK_SYS_PLL_PFD1_DIV2] = imx_clk_hw_fixed_factor("sys_pll_pfd1_div2", in imx93_clocks_probe()