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Searched refs:IMX8ULP_CLK_SPLL3_PFD1_DIV2 (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx8ulp-clock.h25 #define IMX8ULP_CLK_SPLL3_PFD1_DIV2 18 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8ulp.c190 …clks[IMX8ULP_CLK_SPLL3_PFD1_DIV2] = imx_clk_hw_divider("spll3_pfd1_div2", "spll3_pfd1_div2_gate", … in imx8ulp_clk_cgc1_init()