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Searched refs:IMX8ULP_CLK_PLL4_VCODIV (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx8ulp-clock.h69 #define IMX8ULP_CLK_PLL4_VCODIV 2 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8ulp.c252 clks[IMX8ULP_CLK_PLL4_VCODIV] = imx_clk_hw_divider("pll4_vcodiv", "pll4", base + 0x604, 0, 6); in imx8ulp_clk_cgc2_init()