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Searched refs:IMX8ULP_CLK_PLL4_PFD2_DIV1_GATE (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx8ulp-clock.h84 #define IMX8ULP_CLK_PLL4_PFD2_DIV1_GATE 17 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx8ulp.c274 …clks[IMX8ULP_CLK_PLL4_PFD2_DIV1_GATE] = imx_clk_hw_gate_dis("pll4_pfd2_div1_gate", "pll4_pfd2", ba… in imx8ulp_clk_cgc2_init()