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Searched refs:IMX8QXP_SDHC0_DIV (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/drivers/clk/imx/
H A Dclk-imx8.c77 case IMX8QXP_SDHC0_DIV: in imx8_clk_get_rate()
182 case IMX8QXP_SDHC0_DIV: in imx8_clk_set_rate()
271 case IMX8QXP_SDHC0_DIV: in __imx8_clk_enable()
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx8qxp-clock.h201 #define IMX8QXP_SDHC0_DIV 182 macro
/openbmc/u-boot/arch/arm/dts/
H A Dfsl-imx8dx.dtsi414 assigned-clocks = <&clk IMX8QXP_SDHC0_SEL>, <&clk IMX8QXP_SDHC0_DIV>;