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Searched refs:IMX7ULP_CLK_DMA_MUX1 (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx7ulp-clock.h71 #define IMX7ULP_CLK_DMA_MUX1 4 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx7ulp-clock.h60 #define IMX7ULP_CLK_DMA_MUX1 43 macro
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dfsl,edma.yaml202 clocks = <&pcc2 IMX7ULP_CLK_DMA1>, <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx7ulp.c155 hws[IMX7ULP_CLK_DMA_MUX1] = imx_clk_hw_gate("dma_mux1", "nic1_bus_clk", base + 0x84, 30); in imx7ulp_clk_pcc2_init()
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx7ulp.dtsi122 <&pcc2 IMX7ULP_CLK_DMA_MUX1>;
/openbmc/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi159 clocks = <&clks IMX7ULP_CLK_DMA1>, <&clks IMX7ULP_CLK_DMA_MUX1>;