Searched refs:IMX7ULP_CLK_CORE_DIV (Results 1 – 4 of 4) sorted by relevance
41 #define IMX7ULP_CLK_CORE_DIV 28 macro
43 #define IMX7ULP_CLK_CORE_DIV 28 macro
110 …hws[IMX7ULP_CLK_CORE_DIV] = imx_clk_hw_divider_flags("divcore", "scs_sel", base + 0x14, 16, 4, CL… in imx7ulp_clk_scg1_init()111 …hws[IMX7ULP_CLK_CORE] = imx_clk_hw_cpu("core", "divcore", hws[IMX7ULP_CLK_CORE_DIV]->clk, hws[IMX… in imx7ulp_clk_scg1_init()
294 clocks = <&scg1 IMX7ULP_CLK_CORE_DIV>,