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Searched refs:IMX7D_PLL_DRAM_MAIN_CLK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx7d-clock.h57 #define IMX7D_PLL_DRAM_MAIN_CLK 48 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx7d-clock.h61 #define IMX7D_PLL_DRAM_MAIN_CLK 48 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx7d.c424 …hws[IMX7D_PLL_DRAM_MAIN_CLK] = imx_clk_hw_gate("pll_dram_main_clk", "pll_dram_test_div", base + 0x… in imx7d_clocks_init()