Searched refs:IMX6UL_CLK_ENET2_REF (Results 1 – 8 of 8) sorted by relevance
58 #define IMX6UL_CLK_ENET2_REF 45 macro
54 #define IMX6UL_CLK_ENET2_REF 45 macro
224 hws[IMX6UL_CLK_ENET2_REF] = clk_hw_register_divider_table(NULL, "enet2_ref", "pll6_enet", 0, in imx6ul_clocks_init()526 clk_set_rate(hws[IMX6UL_CLK_ENET2_REF]->clk, 50000000); in imx6ul_clocks_init()546 clk_set_parent(hws[IMX6UL_CLK_ENET2_REF_SEL]->clk, hws[IMX6UL_CLK_ENET2_REF]->clk); in imx6ul_clocks_init()
143 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
129 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
222 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
214 clocks = <&clks IMX6UL_CLK_ENET2_REF>;
142 clocks = <&clks IMX6UL_CLK_ENET2_REF>;