Searched refs:IMX6SX_CLK_PLL2_BUS (Results 1 – 3 of 3) sorted by relevance
14 #define IMX6SX_CLK_PLL2_BUS 5 macro
18 #define IMX6SX_CLK_PLL2_BUS 5 macro
186 hws[IMX6SX_CLK_PLL2_BUS] = imx_clk_hw_gate("pll2_bus", "pll2_bypass", base + 0x30, 13); in imx6sx_clocks_init()548 clk_set_parent(hws[IMX6SX_CLK_QSPI1_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk); in imx6sx_clocks_init()549 clk_set_parent(hws[IMX6SX_CLK_QSPI2_SEL]->clk, hws[IMX6SX_CLK_PLL2_BUS]->clk); in imx6sx_clocks_init()