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Searched refs:IMX6SL_CLK_PLL5_VIDEO_DIV (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx6sl-clock.h25 #define IMX6SL_CLK_PLL5_VIDEO_DIV 16 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6sl-clock.h29 #define IMX6SL_CLK_PLL5_VIDEO_DIV 16 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6sl.c270 …hws[IMX6SL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_… in imx6sl_clocks_init()
438 hws[IMX6SL_CLK_PLL5_VIDEO_DIV]->clk); in imx6sl_clocks_init()