Searched refs:IMX6SL_CLK_PLL5_VIDEO_DIV (Results 1 – 3 of 3) sorted by relevance
25 #define IMX6SL_CLK_PLL5_VIDEO_DIV 16 macro
29 #define IMX6SL_CLK_PLL5_VIDEO_DIV 16 macro
270 …hws[IMX6SL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post_… in imx6sl_clocks_init()438 hws[IMX6SL_CLK_PLL5_VIDEO_DIV]->clk); in imx6sl_clocks_init()