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Searched refs:IMX6SL_CLK_PLL2_BUS (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dimx6sl-clock.h13 #define IMX6SL_CLK_PLL2_BUS 4 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6sl-clock.h17 #define IMX6SL_CLK_PLL2_BUS 4 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6sl.c243 hws[IMX6SL_CLK_PLL2_BUS] = imx_clk_hw_gate("pll2_bus", "pll2_bypass", base + 0x30, 13); in imx6sl_clocks_init()