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Searched refs:IMX6SLL_CLK_PLL5_VIDEO_DIV (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6sll-clock.h59 #define IMX6SLL_CLK_PLL5_VIDEO_DIV 46 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx6sll-clock.h57 #define IMX6SLL_CLK_PLL5_VIDEO_DIV 46 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6sll.c181 …hws[IMX6SLL_CLK_PLL5_VIDEO_DIV] = clk_hw_register_divider_table(NULL, "pll5_video_div", "pll5_post… in imx6sll_clocks_init()