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Searched refs:IMX6SLL_CLK_PLL5_VIDEO (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6sll-clock.h41 #define IMX6SLL_CLK_PLL5_VIDEO 28 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx6sll-clock.h39 #define IMX6SLL_CLK_PLL5_VIDEO 28 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6sll.c143 hws[IMX6SLL_CLK_PLL5_VIDEO] = imx_clk_hw_gate("pll5_video", "pll5_bypass", base + 0xa0, 13); in imx6sll_clocks_init()