Searched refs:IMX6SLL_CLK_PLL3_USB_OTG (Results 1 – 5 of 5) sorted by relevance
39 #define IMX6SLL_CLK_PLL3_USB_OTG 26 macro
37 #define IMX6SLL_CLK_PLL3_USB_OTG 26 macro
141 hws[IMX6SLL_CLK_PLL3_USB_OTG] = imx_clk_hw_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); in imx6sll_clocks_init()349 clk_set_parent(hws[IMX6SLL_CLK_PERIPH_CLK2_SEL]->clk, hws[IMX6SLL_CLK_PLL3_USB_OTG]->clk); in imx6sll_clocks_init()
138 <&clks IMX6SLL_CLK_PLL3_USB_OTG>, <&clks IMX6SLL_CLK_PERIPH>,530 clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;
535 clocks = <&clks IMX6SLL_CLK_PLL3_USB_OTG>;