Searched refs:IMX6SLL_CLK_PERIPH_CLK2_SEL (Results 1 – 4 of 4) sorted by relevance
70 #define IMX6SLL_CLK_PERIPH_CLK2_SEL 57 macro
68 #define IMX6SLL_CLK_PERIPH_CLK2_SEL 57 macro
200 …hws[IMX6SLL_CLK_PERIPH_CLK2_SEL] = imx_clk_hw_mux("periph_clk2_sel", base + 0x18, 12, 2, periph_… in imx6sll_clocks_init()349 clk_set_parent(hws[IMX6SLL_CLK_PERIPH_CLK2_SEL]->clk, hws[IMX6SLL_CLK_PLL3_USB_OTG]->clk); in imx6sll_clocks_init()
140 <&clks IMX6SLL_CLK_PERIPH_CLK2_SEL>, <&clks IMX6SLL_CLK_OSC>,