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Searched refs:IMX6QDL_CLK_PLL2_PFD2_396M (Results 1 – 9 of 9) sorted by relevance

/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-logicpd.dts67 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
68 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
H A Dimx6q.dtsi43 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
80 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
115 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
150 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
H A Dimx6dl.dtsi38 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
71 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
/openbmc/u-boot/arch/arm/dts/
H A Dimx6q.dtsi43 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
77 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
111 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
145 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
H A Dimx6q-logicpd.dts147 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
148 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
H A Dimx6dl.dtsi38 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
68 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6qdl-clock.h18 #define IMX6QDL_CLK_PLL2_PFD2_396M 6 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx6qdl-clock.h15 #define IMX6QDL_CLK_PLL2_PFD2_396M 6 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6q.c158 case IMX6QDL_CLK_PLL2_PFD2_396M: in ldb_di_sel_by_clock_id()
351 hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk)) { in init_ldb_clks()
404 hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk) in disable_anatop_clocks()
579 …hws[IMX6QDL_CLK_PLL2_PFD2_396M] = imx_clk_hw_pfd("pll2_pfd2_396m", "pll2_bus", base + 0x100, 2… in imx6q_clocks_init()
946 clk_set_parent(hws[IMX6QDL_CLK_ENFC_SEL]->clk, hws[IMX6QDL_CLK_PLL2_PFD2_396M]->clk); in imx6q_clocks_init()