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Searched refs:IMX6QDL_CLK_PLL1_SYS (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/arch/arm/dts/
H A Dimx6q.dtsi46 <&clks IMX6QDL_CLK_PLL1_SYS>;
80 <&clks IMX6QDL_CLK_PLL1_SYS>;
114 <&clks IMX6QDL_CLK_PLL1_SYS>;
148 <&clks IMX6QDL_CLK_PLL1_SYS>;
H A Dimx6dl.dtsi41 <&clks IMX6QDL_CLK_PLL1_SYS>;
71 <&clks IMX6QDL_CLK_PLL1_SYS>;
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q.dtsi46 <&clks IMX6QDL_CLK_PLL1_SYS>;
83 <&clks IMX6QDL_CLK_PLL1_SYS>;
118 <&clks IMX6QDL_CLK_PLL1_SYS>;
153 <&clks IMX6QDL_CLK_PLL1_SYS>;
H A Dimx6dl.dtsi41 <&clks IMX6QDL_CLK_PLL1_SYS>;
74 <&clks IMX6QDL_CLK_PLL1_SYS>;
/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6qdl-clock.h183 #define IMX6QDL_CLK_PLL1_SYS 170 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx6qdl-clock.h180 #define IMX6QDL_CLK_PLL1_SYS 170 macro
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6q.c507 hws[IMX6QDL_CLK_PLL1_SYS] = imx_clk_hw_gate("pll1_sys", "pll1_bypass", base + 0x00, 13); in imx6q_clocks_init()