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Searched refs:IMX6QDL_CLK_IPU1_DI1_PRE_SEL (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx6qdl-clock.h48 #define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx6qdl-clock.h45 #define IMX6QDL_CLK_IPU1_DI1_PRE_SEL 36 macro
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6q-bx50v3.dtsi401 <&clks IMX6QDL_CLK_IPU1_DI1_PRE_SEL>,
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx6q.c664 …hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL] = imx_clk_hw_mux_flags("ipu1_di1_pre_sel", base + 0x34, 15, 3, i… in imx6q_clocks_init()
933 clk_set_parent(hws[IMX6QDL_CLK_IPU1_DI1_PRE_SEL]->clk, hws[IMX6QDL_CLK_PLL5_VIDEO_DIV]->clk); in imx6q_clocks_init()