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Searched refs:IMX5_CLK_UART2_PER_GATE (Results 1 – 7 of 7) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Dimx5-clock.h43 #define IMX5_CLK_UART2_PER_GATE 31 macro
/openbmc/linux/include/dt-bindings/clock/
H A Dimx5-clock.h39 #define IMX5_CLK_UART2_PER_GATE 31 macro
/openbmc/u-boot/arch/arm/dts/
H A Dimx53.dtsi106 <&clks IMX5_CLK_UART2_PER_GATE>;
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx50.dtsi326 <&clks IMX5_CLK_UART2_PER_GATE>;
H A Dimx51.dtsi444 <&clks IMX5_CLK_UART2_PER_GATE>;
H A Dimx53.dtsi564 <&clks IMX5_CLK_UART2_PER_GATE>;
/openbmc/linux/drivers/clk/imx/
H A Dclk-imx5.c191 clk[IMX5_CLK_UART2_PER_GATE] = imx_clk_gate2("uart2_per_gate", "uart_root", MXC_CCM_CCGR1, 12); in mx5_clocks_common_init()