Searched refs:IMX5_CLK_PLL2_SW (Results 1 – 4 of 4) sorted by relevance
| /openbmc/linux/drivers/clk/imx/ |
| H A D | clk-imx5.c | 292 clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base); in mx50_clocks_init()
347 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx50_clocks_init()
348 clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]); in mx50_clocks_init()
377 clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base); in mx51_clocks_init()
438 clk_set_parent(clk[IMX5_CLK_USBOH3_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
441 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
442 clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]); in mx51_clocks_init()
483 clk[IMX5_CLK_PLL2_SW] = imx_clk_pllv2("pll2_sw", "osc", pll_base); in mx53_clocks_init()
592 clk_set_parent(clk[IMX5_CLK_ESDHC_A_SEL], clk[IMX5_CLK_PLL2_SW]); in mx53_clocks_init()
593 clk_set_parent(clk[IMX5_CLK_ESDHC_B_SEL], clk[IMX5_CLK_PLL2_SW]); in mx53_clocks_init()
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| /openbmc/linux/include/dt-bindings/clock/ |
| H A D | imx5-clock.h | 121 #define IMX5_CLK_PLL2_SW 113 macro
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| /openbmc/u-boot/include/dt-bindings/clock/ |
| H A D | imx5-clock.h | 125 #define IMX5_CLK_PLL2_SW 113 macro
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| /openbmc/linux/arch/arm/boot/dts/nxp/imx/ |
| H A D | imx53-smd.dts | 288 assigned-clock-parents = <&clks IMX5_CLK_PLL2_SW>,
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