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Searched refs:IMX2_WDT_WRSR_SFTW (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/watchdog/
H A Dwdt_imx2.h53 #define IMX2_WDT_WRSR_SFTW BIT(0) /* Reset due to software reset */ macro
/openbmc/qemu/hw/watchdog/
H A Dwdt_imx2.c67 s->wrsr &= ~(IMX2_WDT_WRSR_TOUT | IMX2_WDT_WRSR_SFTW); in imx2_wdt_reset()
178 s->wrsr = IMX2_WDT_WRSR_SFTW; in imx2_wdt_write()