Searched refs:IMX1_CLK_PER1 (Results 1 – 3 of 3) sorted by relevance
83 <&clks IMX1_CLK_PER1>;92 <&clks IMX1_CLK_PER1>;112 <&clks IMX1_CLK_PER1>;122 <&clks IMX1_CLK_PER1>;133 <&clks IMX1_CLK_PER1>;152 <&clks IMX1_CLK_PER1>;172 <&clks IMX1_CLK_PER1>;194 <&clks IMX1_CLK_PER1>;
23 #define IMX1_CLK_PER1 14 macro
54 clk[IMX1_CLK_PER1] = imx_clk_divider("per1", "spll_gate", CCM_PCDR, 0, 4); in mx1_clocks_init_dt()