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Searched refs:IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT (Results 1 – 6 of 6) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dce/
H A Ddce_6_0_sh_mask.h7502 #define IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT 0x00000000 macro
H A Ddce_8_0_sh_mask.h2420 #define IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT 0x0 macro
H A Ddce_10_0_sh_mask.h2256 #define IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT 0x0 macro
H A Ddce_11_0_sh_mask.h2208 #define IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT 0x0 macro
H A Ddce_11_2_sh_mask.h2404 #define IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_1_5_sh_mask.h52037 #define IDDCCIF05_DBG_DCCIF_F__DBG_DCCIF_F__SHIFT … macro