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Searched refs:ICPU_TIMER_CTRL_ONE_SHOT_ENA (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h75 #define ICPU_TIMER_CTRL_ONE_SHOT_ENA BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h72 #define ICPU_TIMER_CTRL_ONE_SHOT_ENA BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h79 #define ICPU_TIMER_CTRL_ONE_SHOT_ENA BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h77 #define ICPU_TIMER_CTRL_ONE_SHOT_ENA BIT(2) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/
H A Dddr.h396 writel(ICPU_TIMER_CTRL_ONE_SHOT_ENA | ICPU_TIMER_CTRL_TIMER_ENA, in sleep_100ns()