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Searched refs:ICPU_TIMER_CTRL_FORCE_RELOAD (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h77 #define ICPU_TIMER_CTRL_FORCE_RELOAD BIT(0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h74 #define ICPU_TIMER_CTRL_FORCE_RELOAD BIT(0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h81 #define ICPU_TIMER_CTRL_FORCE_RELOAD BIT(0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h79 #define ICPU_TIMER_CTRL_FORCE_RELOAD BIT(0) macro