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Searched refs:ICPU_MEMCTRL_TIMING2_INIT_DLY_M (Results 1 – 4 of 4) sorted by relevance

/openbmc/u-boot/arch/mips/mach-mscc/include/mach/ocelot/
H A Docelot_icpu_cfg.h177 #define ICPU_MEMCTRL_TIMING2_INIT_DLY_M GENMASK(15, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/serval/
H A Dserval_icpu_cfg.h180 #define ICPU_MEMCTRL_TIMING2_INIT_DLY_M GENMASK(15, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/jr2/
H A Djr2_icpu_cfg.h187 #define ICPU_MEMCTRL_TIMING2_INIT_DLY_M GENMASK(15, 0) macro
/openbmc/u-boot/arch/mips/mach-mscc/include/mach/servalt/
H A Dservalt_icpu_cfg.h185 #define ICPU_MEMCTRL_TIMING2_INIT_DLY_M GENMASK(15, 0) macro