Searched refs:ICH_MISR_EL2_VGRP1D (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/hw/intc/ | ||
| H A D | gicv3_internal.h | 270 #define ICH_MISR_EL2_VGRP1D (1U << 7) macro |
| H A D | arm_gicv3_cpuif.c | 464 value |= ICH_MISR_EL2_VGRP1D; in maintenance_interrupt_state() |