Searched refs:ICH_MISR_EL2_VGRP0E (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/hw/intc/ | ||
| H A D | gicv3_internal.h | 267 #define ICH_MISR_EL2_VGRP0E (1U << 4) macro |
| H A D | arm_gicv3_cpuif.c | 450 value |= ICH_MISR_EL2_VGRP0E; in maintenance_interrupt_state() |