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Searched refs:ICB_0_1_IRQ_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/linux/drivers/accel/ivpu/
H A Divpu_hw_37xx.c54 #define ICB_0_1_IRQ_MASK ((((u64)ICB_1_IRQ_MASK) << 32) | ICB_0_IRQ_MASK) macro
871 REGV_WR64(VPU_37XX_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK); in ivpu_hw_37xx_irq_clear()
877 REGV_WR64(VPU_37XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK); in ivpu_hw_37xx_irq_enable()
H A Divpu_hw_40xx.c58 #define ICB_0_1_IRQ_MASK ((((u64)ICB_1_IRQ_MASK) << 32) | ICB_0_IRQ_MASK) macro
981 REGV_WR64(VPU_40XX_HOST_SS_ICB_CLEAR_0, ICB_0_1_IRQ_MASK); in ivpu_hw_40xx_irq_clear()
987 REGV_WR64(VPU_40XX_HOST_SS_ICB_ENABLE_0, ICB_0_1_IRQ_MASK); in ivpu_hw_40xx_irq_enable()