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Searched refs:IBEX_SPI_HOST_INTR_ENABLE (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/include/hw/ssi/
H A Dibex_spi_host.h42 #define IBEX_SPI_HOST_INTR_ENABLE (0x04 / 4) /* rw */ macro
/openbmc/qemu/hw/ssi/
H A Dibex_spi_host.c137 s->regs[IBEX_SPI_HOST_INTR_ENABLE] = 0x00; in ibex_spi_host_reset()
171 uint32_t intr_en_reg = s->regs[IBEX_SPI_HOST_INTR_ENABLE]; in ibex_spi_host_irq()
303 case IBEX_SPI_HOST_INTR_STATE...IBEX_SPI_HOST_INTR_ENABLE: in ibex_spi_host_read()
368 case IBEX_SPI_HOST_INTR_ENABLE: in ibex_spi_host_write()