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Searched refs:IBEX_SPI_HOST_ERROR_STATUS (Results 1 – 2 of 2) sorted by relevance

/openbmc/qemu/hw/ssi/
H A Dibex_spi_host.c150 s->regs[IBEX_SPI_HOST_ERROR_STATUS] = 0x00; in ibex_spi_host_reset()
176 uint32_t err_status_reg = s->regs[IBEX_SPI_HOST_ERROR_STATUS]; in ibex_spi_host_irq()
324 s->regs[IBEX_SPI_HOST_ERROR_STATUS] |= in ibex_spi_host_read()
404 s->regs[IBEX_SPI_HOST_ERROR_STATUS] |= in ibex_spi_host_write()
423 s->regs[IBEX_SPI_HOST_ERROR_STATUS] |= R_ERROR_STATUS_CMDBUSY_MASK; in ibex_spi_host_write()
466 s->regs[IBEX_SPI_HOST_ERROR_STATUS] |= in ibex_spi_host_write()
505 case IBEX_SPI_HOST_ERROR_STATUS: in ibex_spi_host_write()
/openbmc/qemu/include/hw/ssi/
H A Dibex_spi_host.h55 #define IBEX_SPI_HOST_ERROR_STATUS (0x30 / 4) /* rw1c */ macro