Searched refs:HostCtrl (Results 1 – 4 of 4) sorted by relevance
189 &rrpriv->regs->HostCtrl); in rr_init_one()765 ®s->HostCtrl); in rr_handle_event()772 ®s->HostCtrl); in rr_handle_event()796 ®s->HostCtrl); in rr_handle_event()808 ®s->HostCtrl); in rr_handle_event()815 ®s->HostCtrl); in rr_handle_event()822 ®s->HostCtrl); in rr_handle_event()1220 writel(readl(®s->HostCtrl)|HALT_NIC|RR_CLEAR_INT, ®s->HostCtrl); in rr_open()1221 readl(®s->HostCtrl); in rr_open()1246 writel(readl(®s->HostCtrl)|HALT_NIC|RR_CLEAR_INT, ®s->HostCtrl); in rr_open()[all …]
16 u32 HostCtrl; member
34 u32 HostCtrl; /* 0x40 */ member748 writel(readl(®s->HostCtrl) | MASK_INTS, ®s->HostCtrl); in ace_mask_irq()762 writel(readl(®s->HostCtrl) & ~MASK_INTS, ®s->HostCtrl); in ace_unmask_irq()
564 if ((readl(&ap->regs->HostCtrl) >> 28) == 4) { in acenic_probe_one()883 writel(HW_RESET | (HW_RESET << 24), ®s->HostCtrl); in ace_init()884 readl(®s->HostCtrl); /* PCI write posting */ in ace_init()896 ®s->HostCtrl); in ace_init()899 ®s->HostCtrl); in ace_init()901 readl(®s->HostCtrl); /* PCI write posting */ in ace_init()910 tig_ver = readl(®s->HostCtrl) >> 28; in ace_init()1551 dev->name, (unsigned int)readl(®s->HostCtrl)); in ace_watchdog()2107 if (!(readl(®s->HostCtrl) & IN_INT)) in ace_interrupt()