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Searched refs:HW_SSCG_SYSTEM_PLL3_DIV_SHIFT (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h611 #define HW_SSCG_SYSTEM_PLL3_DIV_SHIFT 8 macro
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c123 pllout_div_shift = HW_SSCG_SYSTEM_PLL3_DIV_SHIFT; in decode_sscg_pll()