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Searched refs:HISTB_UART0_CLK (Results 1 – 5 of 5) sorted by relevance

/openbmc/linux/include/dt-bindings/clock/
H A Dhistb-clock.h67 #define HISTB_UART0_CLK 5 macro
/openbmc/u-boot/include/dt-bindings/clock/
H A Dhistb-clock.h79 #define HISTB_UART0_CLK 5 macro
/openbmc/linux/drivers/clk/hisilicon/
H A Dcrg-hi3798cv200.c285 { HISTB_UART0_CLK, "clk_uart0", "75m",
/openbmc/linux/arch/arm64/boot/dts/hisilicon/
H A Dhi3798cv200.dtsi219 clocks = <&sysctrl HISTB_UART0_CLK>, <&sysctrl HISTB_UART0_CLK>;
/openbmc/u-boot/arch/arm/dts/
H A Dhi3798cv200.dtsi222 clocks = <&sysctrl HISTB_UART0_CLK>;