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Searched refs:HHI_PCIE_PLL_CNTL5 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-axg.h44 #define HHI_PCIE_PLL_CNTL5 0xec macro
/openbmc/linux/drivers/clk/meson/
H A Daxg.h45 #define HHI_PCIE_PLL_CNTL5 0xec macro
H A Dg12a.h45 #define HHI_PCIE_PLL_CNTL5 0x0AC macro
H A Daxg.c709 { .reg = HHI_PCIE_PLL_CNTL5, .def = 0x00078000 },
H A Dg12a.c1842 { .reg = HHI_PCIE_PLL_CNTL5, .def = 0x68000048 },
1843 { .reg = HHI_PCIE_PLL_CNTL5, .def = 0x68000068, .delay_us = 20 },