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Searched refs:HHI_PCIE_PLL_CNTL1 (Results 1 – 5 of 5) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-axg.h40 #define HHI_PCIE_PLL_CNTL1 0xdC macro
/openbmc/linux/drivers/clk/meson/
H A Daxg.h41 #define HHI_PCIE_PLL_CNTL1 0xdC macro
H A Dg12a.h41 #define HHI_PCIE_PLL_CNTL1 0x09C macro
H A Daxg.c705 { .reg = HHI_PCIE_PLL_CNTL1, .def = 0x0084a2aa },
732 .reg_off = HHI_PCIE_PLL_CNTL1,
H A Dg12a.c1838 { .reg = HHI_PCIE_PLL_CNTL1, .def = 0x00000000 },
1874 .reg_off = HHI_PCIE_PLL_CNTL1,