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Searched refs:HHI_PCIE_PLL_CNTL (Results 1 – 3 of 3) sorted by relevance

/openbmc/u-boot/arch/arm/include/asm/arch-meson/
H A Dclock-axg.h39 #define HHI_PCIE_PLL_CNTL 0xd8 macro
/openbmc/linux/drivers/clk/meson/
H A Daxg.h40 #define HHI_PCIE_PLL_CNTL 0xd8 macro
H A Daxg.c711 { .reg = HHI_PCIE_PLL_CNTL, .def = 0x400106c8 },
717 .reg_off = HHI_PCIE_PLL_CNTL,
722 .reg_off = HHI_PCIE_PLL_CNTL,
727 .reg_off = HHI_PCIE_PLL_CNTL,
737 .reg_off = HHI_PCIE_PLL_CNTL,
742 .reg_off = HHI_PCIE_PLL_CNTL,
762 .offset = HHI_PCIE_PLL_CNTL,