Searched refs:HHI_MEM_PD_REG0 (Results 1 – 9 of 9) sorted by relevance
/openbmc/linux/drivers/pmdomain/amlogic/ |
H A D | meson-ee-pwrc.c | 38 #define HHI_MEM_PD_REG0 (0x40 << 2) macro 150 VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 157 VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 163 VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 167 { HHI_MEM_PD_REG0, GENMASK(3, 2) }, 171 { HHI_MEM_PD_REG0, GENMASK(1, 0) }, 177 VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 189 VPU_HHI_MEMPD(HHI_MEM_PD_REG0), 198 { HHI_MEM_PD_REG0, GENMASK(31, 30) }, 210 { HHI_MEM_PD_REG0, GENMASK(5, 4) }, [all …]
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H A D | meson-gx-pwrc-vpu.c | 27 #define HHI_MEM_PD_REG0 (0x40 << 2) macro 68 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_off() 111 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_off() 167 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_power_on() 221 regmap_update_bits(pd->regmap_hhi, HHI_MEM_PD_REG0, in meson_g12a_pwrc_vpu_power_on()
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/openbmc/u-boot/drivers/power/domain/ |
H A D | meson-gx-pwrc-vpu.c | 26 #define HHI_MEM_PD_REG0 (0x40 << 2) macro 70 regmap_update_bits(priv->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_on() 115 regmap_update_bits(priv->regmap_hhi, HHI_MEM_PD_REG0, in meson_gx_pwrc_vpu_off()
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/openbmc/u-boot/drivers/video/meson/ |
H A D | meson_dw_hdmi.c | 34 #define HHI_MEM_PD_REG0 0x100 /* 0x40 */ macro 265 dw_hdmi_hhi_update_bits(priv, HHI_MEM_PD_REG0, 0xff << 8, 0); in meson_dw_hdmi_phy_init() 388 dw_hdmi_hhi_update_bits(priv, HHI_MEM_PD_REG0, 0xff << 8, 0); in meson_dw_hdmi_probe()
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/openbmc/u-boot/arch/arm/include/asm/arch-meson/ |
H A D | clock-axg.h | 48 #define HHI_MEM_PD_REG0 0x100 macro
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H A D | clock-gx.h | 29 #define HHI_MEM_PD_REG0 0x100 /* 0x40 offset in data sheet */ macro
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/openbmc/linux/drivers/clk/meson/ |
H A D | axg.h | 49 #define HHI_MEM_PD_REG0 0x100 macro
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H A D | gxbb.h | 30 #define HHI_MEM_PD_REG0 0x100 /* 0x40 offset in data sheet */ macro
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/openbmc/linux/drivers/gpu/drm/meson/ |
H A D | meson_dw_hdmi.c | 105 #define HHI_MEM_PD_REG0 0x100 /* 0x40 */ macro 620 regmap_update_bits(priv->hhi, HHI_MEM_PD_REG0, 0xff << 8, 0); in meson_dw_hdmi_init()
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